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| | Issue Date | Title | Author(s) | Journal |
| 1 | 1-Feb-2019 | Deep p-Ring Trench Termination: An Innovative and Cost-Effective Way to Reduce Silicon Area | Antoniou, M. ; Lophitis, Neophytos ; Udrea, F. ; Rahimo, M. ; Vemulapati, U. ; Corvasce, C. ; Badstuebner, U. | IEEE Electron Device Letters |
| 2 | 1-Sep-2018 | Optimal gate commutated thyristor design for bi-mode gate commutated thyristors underpinning high, temperature independent, current controllability | Lophitis, N. ; Antoniou, M. ; Vemulapati, U. ; Vobecky, J. ; Badstuebner, U. ; Wikstroem, T. ; Stiasny, T. ; Rahimo, M. ; Udrea, F. | IEEE Electron Device Letters |
| 3 | 1-Apr-2016 | New bi-mode gate-commutated thyristor design concept for high-current controllability and low ON-state voltage drop | Lophitis, Neophytos ; Antoniou, M. ; Vemulapati, U. ; Arnold, M. ; Nistor, I. ; Vobecky, J. ; Rahimo, M. ; Udrea, F. | IEEE Electron Device Letters |
| 4 | 1-Aug-2015 | Novel Approach Toward Plasma Enhancement in Trench-Insulated Gate Bipolar Transistors | Antoniou, M. ; Lophitis, Neophytos ; Bauer, F. ; Nistor, I. ; Bellini, M. ; Rahimo, M. ; Amaratunga, G. ; Udrea, F. | IEEE Electron Device Letters |
