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  4. Static and Short-Circuit Performance Analysis of the 4H-SiC 3.3 kV Trench Semi-SJ MOSFET
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Static and Short-Circuit Performance Analysis of the 4H-SiC 3.3 kV Trench Semi-SJ MOSFET

Date Issued
2025
Author(s)
Melnyk, Kyrylo  
Renz, Arne B.  
Kotagama, Virendra  
Cao, Qinze  
Iosifidis, Nikolaos  
Gammon, Peter M.  
Gott, James A.  
Shah, Vishal A.  
Lophitis, Neophytos  
Rahimo, Munaf  
Nistor, Iulian  
Maresca, Luca  
Irace, Andrea  
Antoniou, Marina  
DOI
10.1109/ECCE-Europe62795.2025.11238894
Abstract
This study investigates the static and Short-Circuit performance of a 3.3 kV semi-Superjunction (SJ) MOSFET using TCAD simulations, benchmarked against a fabricated conventional planar MOSFET. The proposed design is based on the cost-effective trench etching and side-wall implantation fabrication method. The analysis demonstrates a wide implantation window, defined by SC withstand time (SCWT) and maximum blocking voltage (BV) performance. Compared to the fabricated MOSFET, the proposed semi-SJ design achieves a 22% improvement in on-state resistance (Ron) and an 11% increase in maximum BV.
Funding(s)
AdvanSiC-Advances in Cost-Effective HV SiC Power Devices for Europe’s Medium Voltage Grids - AdvanSiC  
Subjects

4H-SiC

MOSFET

Trench

Superjunction

ShortCircuit

High voltage device

Robustness

TCAD simulation

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