Viable 3C-SiC-on-Si MOSFET design disrupting current Material Technology Limitations
Date Issued
August 1, 2019
DOI
10.1109/DEMPED.2019.8864910
Abstract
The cubic polytype (3C-) of Silicon Carbide (SiC) is an emerging semiconductor technology for power devices. The featured isotropic material properties along with the Wide Band Gap (WBG) characteristics make it an excellent choice for power Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). Nonetheless, material related limitations originate from the advantageous fact that 3C-SiC can be grown on Silicon (Si) wafers. One of these major limitations is an almost negligible activation of the p-type dopants after ion implantation because the annealing has to take place at relatively low temperatures. In this paper, a novel process flow for a vertical 3C-SiC-on-Si MOSFET is presented to overcome the difficulties that currently exist in obtaining a p-body region through implantation. The proposed design has been accurately simulated with Technology Computer Aided Design (TCAD) process and device software and a comparison is performed with the conventional SiC MOSFET design. The simulated output characteristics demonstrated a reduced on-resistance and at the same time it is shown that the blocking capability can be maintained to the same level. The promising performance of the novel design discussed in this paper is potentially the solution needed and a huge step towards the realisation of 3C-SiC-on-Si MOSFETs with commercially grated characteristics.