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  4. Performance Improvement of >10kV SiC IGBTs with Retrograde p-Well
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Performance Improvement of >10kV SiC IGBTs with Retrograde p-Well

Journal
Materials Science Forum
Date Issued
January 1, 2019
Author(s)
Tiwari, Amit K.  
Antoniou, M.  
Lophitis, Neophytos  
Perkins, Samuel  
Trajkovic, T.  
Udrea, F.  
DOI
10.4028/www.scientific.net/MSF.963.639
Abstract
A p-well consisting of a retrograde doping profile is investigated for performance improvement of >10kV SiC IGBTs. The retrograde p-well, which can be realized using low-energy shallow implants, effectively addresses the punch-through, a common issue in high-voltage vertical architectures consisting of a conventional p-well with typical doping density of 1e17cm-3 and depth 1µm. The innovative approach offers an extended control over the threshold voltage. Without any punch-through, a threshold voltage in the range 6V-7V is achieved with gate-oxide thickness of 100nm. Gate oxide thickness is typically restricted to 50nm if a conventional p-well with doping density of 1e17cm-3 is utilized. We therefore propose a highly promising solution, the retrograde pwell, for the development of >10kV SiC IGBTs.
Subjects

Breakdown Voltage

High-voltage SiC IGBT...

Ion-implantation

Punch-through

Retrograde p-well

Threshold voltage con...

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