High throughput implementation of the new Secure Hash Algorithm through partial unrolling

Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.14279/13937

Title:	High throughput implementation of the new Secure Hash Algorithm through partial unrolling
Authors:	Michail, Harris Goutis, Costas E. Aisopos, Konstantinos Kakarountas, Athanasios P.
Major Field of Science:	Engineering and Technology
Field Category:	Electrical Engineering - Electronic Engineering - Information Engineering
Keywords:	Hash functions;Field programmable gate arrays (FPGA);Cryptographic hash
Issue Date:	Nov-2005
Source:	(2005) IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, 2005, art. no. 1579846, pp. 99-103
Volume:	2005
Conference:	IEEE Workshop on Signal Processing Systems - Design and Implementation
Abstract:	A design approach to create small-sized high-speed implementation of the new version of Secure Hash Algorithm is proposed. The resulted design can be easily embedded to operate in HMAC IP cores, providing a high degree of security. The proposed implementation does not introduce significant area penalty, compared to other competitive designs. However the achieved throughput presents an increase compared to commercially available IP cores that range from 43%-1830%. © 2005 IEEE.
ISSN:	1520-6130
DOI:	10.1109/SIPS.2005.1579846
Rights:	© 2005 IEEE
Type:	Conference Papers
Affiliation :	University of Patras
Appears in Collections:	Δημοσιεύσεις σε συνέδρια /Conference papers or poster or presentation

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