Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.14279/8227
Title: A fast digital fuzzy logic controller: FPGA design and implementation
Authors: Nenedakis, F. I. 
Tzafestas, Spyros G. 
Deliparaschos, Kyriakos M. 
metadata.dc.contributor.other: Δεληπαράσχος, Κυριάκος
Major Field of Science: Engineering and Technology
Field Category: Electrical Engineering - Electronic Engineering - Information Engineering
Keywords: Digital fuzzy logic controller (DFLC);Hardware complexity;Internal core processing;Computer hardware;Data processing;Field programmable gate arrays (FPGA);Formal languages;Fuzzy sets;Natural frequencies
Issue Date: Sep-2005
Source: 10th IEEE Conference on Emerging Technologies and Factory Automation, 2005, Catania, Italy, 19-22 September
Link: http://users.ntua.gr/kdelip/resources/pdf/Deliparaschos-et-al.---2005---A-fast-digital-fuzzy-logic-controller-FPGA-design.pdf
Conference: IEEE Conference on Emerging Technologies and Factory Automation 
Abstract: This paper describes an improved approach to design a Takagi-Sugeno zero-order type fast parameterized digital fuzzy logic controller (DFLC) processing only the active rules (rules that give a non-null contribution for a given input data set), at high frequency of operation, without significant increase in hardware complexity. To achieve this goal, an improved method of designing the fuzzy controller model is proposed that significantly reduces the time required to process the active rules and effectively increases the input data processing rate. The DFLC discussed in this paper achieves an internal core processing speed of at least 200 MHz, featuring two 8-bit inputs and one 12-bit output, with up to seven trapezoidal shape membership functions per input and a rule base of up to 49 rules. The proposed architecture was implemented in a Field Programmable Gate Array (FPGA) chip with the use of a very high-speed integrated-circuits hardware-description-language (VHDL) and advanced synthesis and place and route tools.
ISBN: 0-7803-9401-1
DOI: 10.1109/ETFA.2005.1612530
Rights: IEEE
Type: Conference Papers
Affiliation : National Technical University Of Athens 
Publication Type: Peer Reviewed
Appears in Collections:Δημοσιεύσεις σε συνέδρια /Conference papers or poster or presentation

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