Simulation of the electrical characteristics of MOS capacitors on strained-silicon substrates
File(s)
Journal
Physica Status Solidi (C)
Date Issued
October 29, 2008
Author(s)
Abstract
In this work, we analyze the electrical characteristics of MOS capacitors fabricated on strained silicon substrates using the commercial software Taurus/Synopsis. The effect of various parameters such as Germanium concentration in the Si1-xGex virtual substrate, thickness of the strained-Silicon layer, oxide thickness, fixed charge and interface trapped charge on capacitance - voltage characteristics is examined. Experimental data are compared with simulation results. A strong influence of the s-Si/SiGe heterostructure and its proximity to the s-Si/SiO2 on the electrical characteristics of the system exists. Oxide charge inserted into simulation in order to fit experimental data shows an increase of charge with decreasing s-Si thickness. The effect of interface traps on simulated C-V characteristics is identical when traps are situated in the s-Si/SiO2 or the s-Si/SiGe interface. When increasing the thermal budget by increasing the post oxidation annealing time, the decrease of the hump phenomenon on the C-V curves can be attributed to the Germanium diffusion, according to simulation.