Please use this identifier to cite or link to this item:
https://hdl.handle.net/20.500.14279/4091
Title: | Intelligent on/off dynamic link management for on-chip networks | Authors: | Savva, Andreas G. Theocharides, Theocharis Soteriou, Vassos |
Major Field of Science: | Engineering and Technology | Field Category: | Computer and Information Sciences | Keywords: | Computer science;Embedded computer systems;Microprocessors;Algorithms;Electric network topology;Networks on a chip;Open access publishing | Issue Date: | 2012 | Source: | Journal of electrical and computer engineering, 2012, vol.2012, pp. 1-12 | Volume: | 2012 | Start page: | 1 | End page: | 12 | Journal: | Journal of Electrical and Computer Engineering | Abstract: | Networks-on-chips (NoCs) provide scalable on-chip communication and are expected to be the dominant interconnection architectures in multicore and manycore systems. Power consumption, however, is a major limitation in NoCs today, and researchers have been constantly working on reducing both dynamic and static power. Among the NoC components, links that connect the NoC routers are the most power-hungry components. Several attempts have been made to reduce the link power consumption at both the circuit level and the system level. Most past research efforts have proposed selective on/off link state switching based on system-level information based on link utilization levels. Most of these proposed algorithms focus on a pessimistic and simple static threshold mechanism which determines whether or not a link should be turned on/off. This paper presents an intelligent dynamic power management policy for NoCs with improved predictive abilities based on supervised online learning of the system status (i.e., expected future utilization link levels), where links are turned off and on via the use of a small and scalable neural network. Simulation results with various synthetic traffic models over various network topologies show that the proposed work can reach up to 13% power savings when compared to a trivial threshold computation, at very low (<4%) hardware overheads | URI: | https://hdl.handle.net/20.500.14279/4091 | ISSN: | 20900155 | DOI: | 10.1155/2012/107821 | Rights: | Copyright © 2012 Andreas G. Savva et al. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited. | Type: | Article | Affiliation : | Cyprus University of Technology University of Cyprus |
Appears in Collections: | Άρθρα/Articles |
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This item is licensed under a Creative Commons License