Retrograde p-well for 10-kv class sic igbts
Journal
IEEE Transactions on Electron Devices
Date Issued
July 1, 2019
DOI
10.1109/TED.2019.2918008
Abstract
In this paper, we propose the use of a retrograde doping profile for the p-well for ultrahigh voltage (>uexcl;10 kV) SiC IGBTs. We show that the retrograde p-well effectively addresses the punchthrough issue, whereas offering a robust control over the gate threshold voltage. Both the punchthrough elimination and the gate threshold voltage control are crucial to high-voltage vertical IGBT architectures and are determined by the limits on the doping concentration and the depth that a conventional p-well implant can have. Without any punchthrough, a 10-kV SiC IGBT consisting of retrograde p-well yields gate threshold voltages in the range of 6-7 V with a gate oxide thickness of 100 nm. Gate oxide thickness is typically restricted to 50-60 nm in SiC IGBTs if a conventional p-well with 1 \times 10^{17} cm-3 is utilized. We further show that the optimized retrograde p-well offers the most optimum switching performance. We propose that such an effective retrograde p-well, which requires low-energy shallow implants and thus key to minimize processing challenges and device development cost, is highly promising for the ultrahigh-voltage (>10 kV) SiC IGBT technology.