Please use this identifier to cite or link to this item:
https://hdl.handle.net/20.500.14279/33368
DC Field | Value | Language |
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dc.contributor.author | Vemulapati, Umamaheswara | - |
dc.contributor.author | Stiasny, Thomas | - |
dc.contributor.author | Wikstrom, Tobias | - |
dc.contributor.author | Lophitis, Neophytos | - |
dc.contributor.author | Udrea, Florin | - |
dc.date.accessioned | 2024-12-20T07:39:46Z | - |
dc.date.available | 2024-12-20T07:39:46Z | - |
dc.date.issued | 2020-09-01 | - |
dc.identifier.citation | Proceedings of the International Symposium on Power Semiconductor Devices and ICs, 2020, Volume 2020-September, Pages 490 - 493 | en_US |
dc.identifier.isbn | [9781728148366] | - |
dc.identifier.issn | 10636854 | - |
dc.identifier.uri | https://hdl.handle.net/20.500.14279/33368 | - |
dc.description.abstract | The planar Integrated Gate Commutated Thyristor (IGCT) concept is proposed to simplify the fabrication process of the device and improve the ruggedness as well as electrothermal performance of the device. The planar IGCT concept has been verified experimentally with 4.5kV devices fabricated on 4-inch Si wafers. Afterwards, the electrical characteristics of the planar IGCT were compared with that of the conventional (with trench or mesa gate) IGCT. Both the planar and the conventional IGCTs are fabricated with corrugated p-base referred to as High Power Technology (HPT) design. In addition, mixed-mode TCAD device simulations have been performed to verify the turn-off failure mechanism and to analyze the electro-thermal performance of the planar IGCT in reference to that of the conventional IGCT. | en_US |
dc.language.iso | en | en_US |
dc.rights | Attribution-NonCommercial-NoDerivatives 4.0 International | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/4.0/ | * |
dc.subject | discrete power semiconductor | en_US |
dc.subject | high power semiconductor switch | en_US |
dc.subject | IGCT | en_US |
dc.subject | planar-gate | en_US |
dc.subject | Thyristor | en_US |
dc.subject | trench-gate | en_US |
dc.title | Integrated Gate Commutated Thyristor: From Trench to Planar | en_US |
dc.type | Conference Papers | en_US |
dc.collaboration | Abb Power Grids | en_US |
dc.collaboration | University of Nottingham | en_US |
dc.collaboration | University of Cambridge | en_US |
dc.journals | Open Access | en_US |
dc.country | Switzerland | en_US |
dc.country | United Kingdom | en_US |
dc.subject.field | Engineering and Technology | en_US |
dc.publication | Peer Reviewed | en_US |
dc.relation.conference | International Symposium on Power Semiconductor Devices and ICs | en_US |
dc.identifier.doi | 10.1109/ISPSD46842.2020.9170102 | en_US |
dc.identifier.scopus | 2-s2.0-85090554858 | - |
dc.identifier.url | https://api.elsevier.com/content/abstract/scopus_id/85090554858 | - |
dc.relation.volume | 2020-September | en_US |
cut.common.academicyear | empty | en_US |
dc.identifier.spage | 490 | en_US |
dc.identifier.epage | 493 | en_US |
item.grantfulltext | open | - |
item.openairecristype | http://purl.org/coar/resource_type/c_c94f | - |
item.fulltext | With Fulltext | - |
item.languageiso639-1 | en | - |
item.cerifentitytype | Publications | - |
item.openairetype | conferenceObject | - |
crisitem.author.dept | Department of Electrical Engineering, Computer Engineering and Informatics | - |
crisitem.author.faculty | Faculty of Engineering and Technology | - |
crisitem.author.orcid | 0000-0002-0901-0876 | - |
crisitem.author.parentorg | Faculty of Engineering and Technology | - |
Appears in Collections: | Δημοσιεύσεις σε συνέδρια /Conference papers or poster or presentation |
Files in This Item:
File | Description | Size | Format | |
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Integrated_Gate_Commutated_Thyristor_From_Trench_to_Planar.pdf | 1.21 MB | Adobe PDF | View/Open |
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