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https://hdl.handle.net/20.500.14279/9817
Πεδίο DC | Τιμή | Γλώσσα |
---|---|---|
dc.contributor.author | Athanasiou, George S. | - |
dc.contributor.author | Michail, Harris | - |
dc.contributor.author | Theodoridis, G. | - |
dc.contributor.author | Goutis, Costas E. | - |
dc.date.accessioned | 2017-02-20T12:43:10Z | - |
dc.date.available | 2017-02-20T12:43:10Z | - |
dc.date.issued | 2013-01 | - |
dc.identifier.citation | IET Computers and Digital Techniques, 2013, vol. 7, no. 1, pp. 29-40 | en_US |
dc.identifier.issn | 1751861X | - |
dc.identifier.uri | https://hdl.handle.net/20.500.14279/9817 | - |
dc.description.abstract | Hash functions are included in almost all cryptographic schemes and security protocols for providing authentication services. JH is a new hash function, introduced in 2008 and it is among the five finalists of the international competition for developing the new hash standard SHA-3. In this study, one non-pipelined and four pipelined architectures are introduced for developing high-performance field-programmable gate array (FPGA) designs of the JH function. Special effort has been paid and various design alternatives have been studied to derive efficient FPGA implementations in terms of frequency, area and throughput/ area cost factor. Compared with the best existing non-pipelined FPGA implementations, the throughput/area is improved by 48, 13.5 and 17.8% in Xilinx Virtex-4, Virtex-5 and Virtex-6 families, respectively, and by 6.8 and 21.2% in ALTERA Stratix-III and Stratix-IV, respectively. Also, the improvements of the throughput/area factor of the introduced pipelined architectures over the existing ones are 37.5, 73.1, 15 and 26.3% in Virtex-5, Virtex-6, Stratix-III and Stratix-IV technologies, respectively. | en_US |
dc.format | en_US | |
dc.language.iso | en | en_US |
dc.relation.ispartof | IET Computers and Digital Techniques | en_US |
dc.rights | © The Institution of Engineering and Technology | en_US |
dc.subject | SHA-1 | en_US |
dc.subject | Hash Function | en_US |
dc.subject | Authenticated Encryption | en_US |
dc.title | High-performance FPGA implementations of the cryptographic hash function JH | en_US |
dc.type | Article | en_US |
dc.collaboration | University of Patras | en_US |
dc.collaboration | Cyprus University of Technology | en_US |
dc.subject.category | Computer and Information Sciences | en_US |
dc.journals | Subscription | en_US |
dc.country | Greece | en_US |
dc.country | Cyprus | en_US |
dc.subject.field | Natural Sciences | en_US |
dc.publication | Peer Reviewed | en_US |
dc.identifier.doi | 10.1049/iet-cdt.2012.0070 | en_US |
dc.relation.issue | 1 | en_US |
dc.relation.volume | 7 | en_US |
cut.common.academicyear | 2012-2013 | en_US |
dc.identifier.spage | 29 | en_US |
dc.identifier.epage | 40 | en_US |
item.fulltext | No Fulltext | - |
item.languageiso639-1 | en | - |
item.grantfulltext | none | - |
item.openairecristype | http://purl.org/coar/resource_type/c_6501 | - |
item.cerifentitytype | Publications | - |
item.openairetype | article | - |
crisitem.journal.journalissn | 1751-861X | - |
crisitem.journal.publisher | The Institution of Engineering and Technology | - |
crisitem.author.dept | Department of Electrical Engineering, Computer Engineering and Informatics | - |
crisitem.author.faculty | Faculty of Engineering and Technology | - |
crisitem.author.orcid | 0000-0002-8299-8737 | - |
crisitem.author.parentorg | Faculty of Engineering and Technology | - |
Εμφανίζεται στις συλλογές: | Άρθρα/Articles |
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