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  4. Hermes: Architecting a top-performing fault-tolerant routing algorithm for networks-on-chips
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Hermes: Architecting a top-performing fault-tolerant routing algorithm for networks-on-chips

Date Issued
January 1, 2015
Author(s)
Iordanou, Costas  
Soteriou, Vassos  
Aisopos, Konstantinos  
Kakoulli, Elena  
DOI
10.1109/NOCS.2014.7008782
Abstract
Networks-on-Chips (NoCs) are experiencing escalating susceptibility to wear-out and reduced reliability, with the risk of becoming the key point of failure in an entire multicore chip. In this paper we propose Hermes, a highly-robust, distributed fault-tolerant routing algorithm, whose performance degrades gracefully with increasing faulty NoC link counts. Hermes is a deadlock-free hybrid routing algorithm, utilizing load-balanced routing on fault-free paths, while providing pre-reconfigured escape routes in the vicinity of faults. An initial experimental evaluation shows that Hermes improves network throughput by up to 2.2× when compared against the existing state-of-the-art.
Subjects

Algorithms

Microprocessor chips

Network architecture

Program compilers

Routing algorithms

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