Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.14279/8472
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dc.contributor.authorDeliparaschos, Kyriakos M.-
dc.contributor.authorTzafestas, Spyros G.-
dc.contributor.otherΔεληπαράσχος, Κυριάκος Μ.-
dc.date.accessioned2016-05-11T12:21:18Z-
dc.date.available2016-05-11T12:21:18Z-
dc.date.issued2009-
dc.identifier.citationPanhellenic Conference on Electronics & Telecommunications, 2009, Patra, Greece, Aprilen_US
dc.description.abstractThis paper focuses on the Field Programmable Gate Array (FPGA) design and implementation of intelligent control system applications on a chip, specifically fuzzy logic and genetic algorithm processing units. Initially, an overview of the FPGA technology is presented, followed by design methodologies, development tools and the use of hardware description languages (HDL). Two FPGA design examples with the use of Hardware Description Languages (HDLs) of parameterized fuzzy logic controller cores are discussed. Thereinafter, a System-on-a-Chip (SoC) designed by the authors in previous work and realized on FPGA featuring a Digital Fuzzy Logic Controller (DFLC) and a soft processor core for the path tracking problem of mobile robots is discussed. Finally a Genetic Algorithm implementation (previously published by the authors) in FPGA chip for the Traveling Salesman Problem (TSP) is also discussed.en_US
dc.formatpdfen_US
dc.language.isoenen_US
dc.subjectField Programmable Gate Array (FPGA)en_US
dc.subjectImplementation of intelligent controlen_US
dc.subjectSystem applications on a chipen_US
dc.subjectFuzzy logicen_US
dc.subjectGenetic algorithmen_US
dc.subjectFPGA technologyen_US
dc.subjectHardware description languages (HDLs)en_US
dc.subjectSystem-on-a-chip (SoC)en_US
dc.subjectDigital fuzzy logic controller (DFLC)en_US
dc.titleDesign paradigms of intelligent control systems on a chipen_US
dc.typeConference Papersen_US
dc.collaborationNational Technical University Of Athensen_US
dc.subject.categoryElectrical Engineering - Electronic Engineering - Information Engineeringen_US
dc.reviewPeer Revieweden
dc.countryGreeceen_US
dc.subject.fieldEngineering and Technologyen_US
dc.publicationPeer Revieweden_US
dc.relation.conferencePanhellenic Conference on Electronics & Telecommunicationsen_US
dc.identifier.doi10.13140/2.1.1543.1689en_US
dc.dept.handle123456789/54en
cut.common.academicyear2008-2009en_US
item.cerifentitytypePublications-
item.openairetypeconferenceObject-
item.fulltextWith Fulltext-
item.grantfulltextopen-
item.languageiso639-1en-
item.openairecristypehttp://purl.org/coar/resource_type/c_c94f-
crisitem.author.deptDepartment of Electrical Engineering, Computer Engineering and Informatics-
crisitem.author.facultyFaculty of Engineering and Technology-
crisitem.author.orcid0000-0003-0618-5846-
crisitem.author.parentorgFaculty of Engineering and Technology-
Appears in Collections:Δημοσιεύσεις σε συνέδρια /Conference papers or poster or presentation
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