Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.14279/33110
DC FieldValueLanguage
dc.contributor.authorDiavastos, Andreas-
dc.contributor.authorTrancoso, Pedro-
dc.date.accessioned2024-10-23T06:25:25Z-
dc.date.available2024-10-23T06:25:25Z-
dc.date.issued2017-09-09-
dc.identifier.isbn9781450353632-
dc.identifier.urihttps://hdl.handle.net/20.500.14279/33110-
dc.description.abstractScheduling task-based parallel applications on many-core processors is becoming more challenging and has received lots of attention recently. The main challenge is to efficiently map the tasks to the underlying hardware topology using application characteristics such as the dependences between tasks, in order to satisfy the requirements. To achieve this, each application must be studied exhaustively as to define the usage of the data by the different tasks, that would provide the knowledge for mapping tasks that share the same data close to each other. In addition, different hardware topologies will require different mappings for the same application to produce the best performance. In this work we use the synchronization graph of a task-based parallel application that is produced during compilation and try to automatically tune the scheduling policy on top of any underlying hardware using heuristic-based Genetic Algorithm techniques. This tool is integrated into an actual task-based parallel programming platform called SWITCHES and is evaluated using real applications from the SWITCHES benchmark suite. We compare our results with the execution time of predefined schedules within SWITCHES and observe that the tool can converge close to an optimal solution with no effort from the user and using fewer resources.en_US
dc.formatpdfen_US
dc.language.isoenen_US
dc.titleAuto-tuning static schedules for task data-flow applicationsen_US
dc.typeConference Papersen_US
dc.collaborationUniversity of Cyprusen_US
dc.subject.categoryComputer and Information Sciencesen_US
dc.journalsSubscriptionen_US
dc.countryCyprusen_US
dc.subject.fieldEngineering and Technologyen_US
dc.publicationPeer Revieweden_US
dc.relation.conference1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systemsen_US
dc.identifier.doi10.1145/3152821.3152879en_US
dc.identifier.scopus2-s2.0-85038357016-
dc.identifier.urlhttps://api.elsevier.com/content/abstract/scopus_id/85038357016-
dc.relation.volume1st Workshop on AutotuniNg and aDaptivity AppRoaches for Energy efficient HPC Systems, 2017, pp. 1-6en_US
cut.common.academicyear2017-2018en_US
dc.identifier.spage1en_US
dc.identifier.epage6en_US
item.openairetypeconferenceObject-
item.cerifentitytypePublications-
item.fulltextNo Fulltext-
item.grantfulltextnone-
item.openairecristypehttp://purl.org/coar/resource_type/c_c94f-
item.languageiso639-1en-
crisitem.author.deptDepartment of Electrical Engineering, Computer Engineering and Informatics-
crisitem.author.facultyFaculty of Engineering and Technology-
crisitem.author.orcid0000-0002-7139-4444-
crisitem.author.parentorgFaculty of Engineering and Technology-
Appears in Collections:Δημοσιεύσεις σε συνέδρια /Conference papers or poster or presentation
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