VLSI design and implementation of reconfigurable cryptographic systems for symmetric encryption

Abstract

In this paper a reconfigurable cryptographic system is proposed. The proposed architecture is based on RC5 [1] algorithm standard but it can operate with any cipher. The relationship between the number of block bits, the number of cryptographic rounds (system security), the covered system area resources, and the system's throughput is examined. The proposed cryptographic system is reconfigurable for the number of block bits and the number of cryptographic rounds. These parameters control the system security and the system's throughput. The reconfigurability allows to system adopt temporary parameters in order to be suitable for cryptographic transactions. Finally a parametric VLSI design methodology is proposed for constructing cryptographic systems for symmetric encryption.