Holistic methodology for designing ultra high-speed SHA-1 hashing cryptographic module in hardware
Date Issued
December 1, 2008
Author(s)
DOI
10.1109/EDSSC.2008.4760668
Abstract
Nowadays security is a critical issue as long as electronic transactions are concerned. Moreover taking into consideration the rapid growth of e-commerce and the future needs, it is essential to achieve higher throughput rates for the incorporated security schemes. The most common components in such security schemes are a cipher block and a hash function, with the second one being hard to compete with the throughput achieved by cipher blocks. In this paper a top-down methodology is presented which manages to increase throughput of SHA-1 hash function hardware design about 160% comparing to conventional implementations with a minor area penalty. © 2008 IEEE.