Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.14279/13937
DC FieldValueLanguage
dc.contributor.authorMichail, Harris-
dc.contributor.authorGoutis, Costas E.-
dc.contributor.authorAisopos, Konstantinos-
dc.contributor.authorKakarountas, Athanasios P.-
dc.date.accessioned2019-05-31T09:27:31Z-
dc.date.available2019-05-31T09:27:31Z-
dc.date.issued2005-11-
dc.identifier.citation(2005) IEEE Workshop on Signal Processing Systems, SiPS: Design and Implementation, 2005, art. no. 1579846, pp. 99-103en_US
dc.identifier.issn1520-6130-
dc.description.abstractA design approach to create small-sized high-speed implementation of the new version of Secure Hash Algorithm is proposed. The resulted design can be easily embedded to operate in HMAC IP cores, providing a high degree of security. The proposed implementation does not introduce significant area penalty, compared to other competitive designs. However the achieved throughput presents an increase compared to commercially available IP cores that range from 43%-1830%. © 2005 IEEE.en_US
dc.language.isoenen_US
dc.rights© 2005 IEEEen_US
dc.subjectHash functionsen_US
dc.subjectField programmable gate arrays (FPGA)en_US
dc.subjectCryptographic hashen_US
dc.titleHigh throughput implementation of the new Secure Hash Algorithm through partial unrollingen_US
dc.typeConference Papersen_US
dc.collaborationUniversity of Patrasen_US
dc.subject.categoryElectrical Engineering - Electronic Engineering - Information Engineeringen_US
dc.subject.fieldEngineering and Technologyen_US
dc.relation.conferenceIEEE Workshop on Signal Processing Systems - Design and Implementationen_US
dc.identifier.doi10.1109/SIPS.2005.1579846en_US
dc.relation.volume2005en
cut.common.academicyear2005-2006en_US
item.fulltextNo Fulltext-
item.cerifentitytypePublications-
item.grantfulltextnone-
item.openairecristypehttp://purl.org/coar/resource_type/c_c94f-
item.openairetypeconferenceObject-
item.languageiso639-1en-
crisitem.author.deptDepartment of Electrical Engineering, Computer Engineering and Informatics-
crisitem.author.facultyFaculty of Engineering and Technology-
crisitem.author.orcid0000-0002-8299-8737-
crisitem.author.parentorgFaculty of Engineering and Technology-
Appears in Collections:Δημοσιεύσεις σε συνέδρια /Conference papers or poster or presentation
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