Journals IET Computers and Digital Techniques

IET Computers and Digital Techniques
IET Computers & Digital Techniques publishes technical papers describing recent research and development work in all aspects of digital system-on-chip design and test of electronic and embedded systems, including the development of design automation tools (methodologies, algorithms and architectures). Papers based on the problems associated with the scaling down of CMOS technology are particularly welcome. It is aimed at researchers, engineers and educators in the fields of computer and digital systems design and test.
Impact Factor (2 years)
The Institution of Engineering and Technology
Journal type
Subscription Journal

Journals Publications

Results 1-4 of 4 (Search time: 0.001 seconds).

Issue DateTitleAuthor(s)
131-Jul-2013Dynamic fault-tolerant routing algorithm for networks-on-chip based on localised detouring pathsVitkovskiy, Arseniy ; Soteriou, Vassos ; Nicopoulos, Chrysostomos 
231-Jul-2013High-performance FPGA implementations of the cryptographic hash function JHAthanasiou, George S. ; Michail, Harris ; Theodoridis, G. ; Goutis, Costas E. 
32009Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuseMichail, Harris ; Milidonis, Athanasios S. ; Porpodas, Vasileios 
41-Jan-2014Optimising the SHA-512 cryptographic hash function on FPGAsAthanasiou, George S. ; Michail, Harris ; Theodoridis, George ; Goutis, Costas E.