Please use this identifier to cite or link to this item: https://hdl.handle.net/20.500.14279/4262
DC FieldValueLanguage
dc.contributor.authorSavva, Andreas G.-
dc.contributor.authorTheocharides, Theocharis-
dc.contributor.authorSoteriou, Vassos-
dc.date.accessioned2013-02-15T11:30:09Zen
dc.date.accessioned2013-05-17T10:38:32Z-
dc.date.accessioned2015-12-09T12:04:13Z-
dc.date.available2013-02-15T11:30:09Zen
dc.date.available2013-05-17T10:38:32Z-
dc.date.available2015-12-09T12:04:13Z-
dc.date.issued2011-
dc.identifier.citation2011 IEEE Computer Society Annual Symposium on VLSI, (ISVLSI), 2011, pp. 343-344en_US
dc.identifier.isbn978-0-7695-4447-2 (online)-
dc.identifier.isbn978-1-4577-0803-9 (print)-
dc.identifier.urihttps://hdl.handle.net/20.500.14279/4262-
dc.description.abstractLinks connecting on-chip components are a major source of power consumption in modern-day on-chip interconnects. Several efforts have henceforth focused on reducing the power consumption, the majority of which efforts target selected links for turning on and off. In this paper we propose an intelligent power management policy for networks-on-chip where links are turned off and switched back on based on a neural network, which processes link utilization as feedback from the system and determines which links are candidates for turning off and back on. The neural network is kept relatively small in terms of area and power consumption, as it is used to forecast the optimal utilization threshold for which underutilized links are turned offen_US
dc.language.isoenen_US
dc.rights© Copyright 2011 IEEEen_US
dc.subjectComputer scienceen_US
dc.subjectNeural networksen_US
dc.subjectNetworks on a chipen_US
dc.subjectHardwareen_US
dc.subjectTopologyen_US
dc.titleIntelligent on/off link management for on-chip networksen_US
dc.typeBook Chapteren_US
dc.collaborationCyprus University of Technologyen_US
dc.collaborationUniversity of Nicosiaen_US
dc.subject.categoryComputer and Information Sciencesen_US
dc.reviewpeer reviewed-
dc.countryCyprusen_US
dc.subject.fieldEngineering and Technologyen_US
dc.identifier.doi10.1109/ISVLSI.2011.13en_US
dc.dept.handle123456789/134en
cut.common.academicyear2010-2011en_US
item.fulltextNo Fulltext-
item.cerifentitytypePublications-
item.grantfulltextnone-
item.openairecristypehttp://purl.org/coar/resource_type/c_3248-
item.openairetypebookPart-
item.languageiso639-1en-
crisitem.author.deptDepartment of Electrical Engineering, Computer Engineering and Informatics-
crisitem.author.facultyFaculty of Engineering and Technology-
crisitem.author.orcid0000-0002-2818-0459-
crisitem.author.parentorgFaculty of Engineering and Technology-
Appears in Collections:Κεφάλαια βιβλίων/Book chapters
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