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|Title:||HW/SW co-design integrating high - Speed authentication module for IPSec/IPv6||Authors:||Michail, Harris
|Keywords:||Telecommunication;Hardware implementation;Hash functions;Security||Category:||Electrical Engineering - Electronic Engineering - Information Engineering||Field:||Engineering and Technology||Issue Date:||Jun-2010||Publisher:||IEEE||Source:||5th International Conference on Digital Telecommunications, ICDT 2010, Athens, Glyfada, Greece, 13 June 2010 through 19 June 2010||Conference:||International Conference on Digital Telecommunications||Abstract:||E.U. has set a special goal for 2010 which is the adoption, by at least 25%, of IPv6. IPv6 incorporates the usage of IPSec which provides cryptographic services to every data packet which is transmitted via Internet. This means that there is a major need for High Speed designs of IPSec protocol. It has been shown that the limiting factor of IPSec performance is the incorporated hash function. Hash functions, form a special family of cryptographic algorithms that satisfy current requirements for security, confidentiality and validity for several applications in technology. In this paper we propose a hardware design and implementation that increases throughput and frequency significantly and at the same time keeps the area small enough for the hash function RIPEMD-160. This technique involves the application of partial unrolling and spatial pre-computation. The proposed technique leads to an implementation with 35% higher throughput than the conventional one.||DOI:||10.1109/ICDT.2010.33||Rights:||© 2010 IEEE||Type:||Conference Papers|
|Appears in Collections:||Κεφάλαια βιβλίων/Book chapters|
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