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	Issue Date	Title	Author(s)
1	Jun-2010	Decoupled processors architecture for accelerating data intensive applications using scratch-pad memory hierarchy	Michail, Harris ; Milidonis, Athanasios S. ; Alachiotis, Nikolaos
2	Oct-2009	A top-down design methodology for ultrahigh-performance hashing cores	Michail, Harris ; Kakarountas, Athanasios P. ; Milidonis, Athanasios S. ; Goutis, Costas E.
3	Jan-2009	Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse	Michail, Harris ; Milidonis, Athanasios S. ; Porpodas, Vasileios
4	Apr-2007	A decoupled architecture of processors with scratch-pad memory hierarchy	Michail, Harris ; Milidonis, Athanasios S. ; Alachiotis, Nikolaos
5	Dec-2006	Temporal and system level modifications for high speed VLSI implementations of cryptographic core	Michail, Harris ; Kakarountas, Athanasios P. ; Milidonis, Athanasios S.
6	Dec-2005	Novel high throughput implementation of SHA-256 hash function through pre-computation technique	Michail, Harris ; Milidonis, Athanasios S. ; Kakarountas, Athanasios P.
7	Dec-2004	Efficient implementation of the Keyed-Hash Message Authentication Code (HMAC) using the SHA-1 hash function	Michail, Harris ; Kakarountas, Athanasios P. ; Milidonis, Athanasios S.