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| | Issue Date | Title | Author(s) |
| 1 | 1-Dec-2009 | High-throughput implementation of the RIPEMD-160 | Kakarountas, Athanasios P. ; Michail, Harris ; Goutis, Costas E. ; Rjoub, Abdoul M. |
| 2 | Oct-2009 | A top-down design methodology for ultrahigh-performance hashing cores | Michail, Harris ; Kakarountas, Athanasios P. ; Milidonis, Athanasios S. ; Goutis, Costas E. |
| 3 | Jun-2009 | An RNS implementation of an Fp elliptic curve point multiplier | Fournaris, Apostolos P. ; Kakarountas, Atharoutas P. ; Michail, Harris ; Stouraitis, Thanos ; Schinianakis, Dimitrios M. |
| 4 | Feb-2009 | Improved throughput bit-serial multiplier for GF(2m) fields | Michail, Harris ; Selimis, George N. ; Fournaris, Apostolos P. |
| 5 | Jan-2009 | Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse | Michail, Harris ; Milidonis, Athanasios S. ; Porpodas, Vasileios |
| 6 | 2009 | Assessing Students’ Learning in MIS using Concept Mapping | Gregoriades, Andreas ; Pampaka, Maria ; Michail, Harris |
| 7 | 29-Dec-2008 | Application of novel technique in RIPEMD-160 aiming at high-throughput | Michail, Harris ; Thnanasoulis, V. N. ; Schinianakis, D. M. ; Panagiotakopoulos, G. A. ; Goutis, C. E. |
| 8 | 1-Dec-2008 | Holistic methodology for designing ultra high-speed SHA-1 hashing cryptographic module in hardware | Michail, Harris ; Goutis, C. |
| 9 | 1-Dec-2007 | Implementation of HSSec: A high-speed cryptographic co-processor | Kakarountas, A. P. ; Goutis, C. E. ; Michail, Harris ; Efstathiou, C. |
| 10 | Sep-2007 | Integration of a concurrent signature monitoring mechanism in a system-on-a-chip | Kakarountas, Athanasios P.; Goutis, Costas E.; Michail, Harris |
| 11 | Aug-2007 | Throughput optimization of the cipher message authentication code | Selimis, G. ; Michail, Harris ; Kakarountas, A. P. ; Goutis, C. E. |
| 12 | Apr-2007 | A decoupled architecture of processors with scratch-pad memory hierarchy | Michail, Harris ; Milidonis, Athanasios S. ; Alachiotis, Nikolaos |
| 13 | Apr-2007 | Server side hashing core exceeding 3 Gbps of throughput | Michail, Harris ; Goutis, Costas E.; Panagiotakopoulos, George A. ; Thanasoulis, Vasilis N. ; Kakarountas, Athanasios P. |
| 14 | 1-Dec-2006 | Temporal and system level modifications for high speed VLSI implementations of cryptographic core | Thanasoulis, V. N. ; Milidonis, A. S. ; Kakarountas, A. P. ; Goutis, C. E. ; Panagiotakopoulos, G. A. ; Michail, Harris |
| 15 | Dec-2006 | Temporal and system level modifications for high speed VLSI implementations of cryptographic core | Michail, Harris ; Kakarountas, Athanasios P. ; Milidonis, Athanasios S. |
| 16 | Aug-2006 | High-speed FPGA implementation of secure hash algorithm for IPSec and VPN applications | Kakarountas, Athanasios P.; Theodoridis, George; Milidonis, Athanasios ; Goutis, Costas E.; Michail, Harris |
| 17 | May-2006 | A novel high-throughput implementation of a partially unrolled SHA-512 | Aisopos, Fotis ; Michail, Harris ; Kakarountas, Athanasios P.; Aisopos, Konstantinos; Schinianakis, Dimitris |
| 18 | Mar-2006 | Maximizing the hash function of authentication codes | Michail, Harris ; Yiakoumis, Ioannis I. ; Papadonikolakis, Markos E. |
| 19 | 1-Dec-2005 | Efficient small-sized implementation of the keyed-hash message authentication code | Yiakoumis, Ioannis ; Michail, Harris ; Papadonikolakis, Markos ; Goutis, Costas E.; Kakarountas, Athanasios P. |
| 20 | 1-Dec-2005 | VLSI design and implementation of reconfigurable cryptographic systems for symmetric encryption | Lazarou, N. ; Michail, Harris ; Koufopavlou, O. ; Selimis, G. |
