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|Title:||Temporal and system level modifications for high speed VLSI implementations of cryptographic core||Authors:||Michail, Harris
Kakarountas, Athanasios P.
Milidonis, Athanasios S.
|Keywords:||Cryptography;Application software;Household electronics;Reliability||Issue Date:||2006||Publisher:||IEEE||Source:||Proceedings of the IEEE International Conference on Electronics, Circuits and Systems, 2006, Pages 1180-1183||Abstract:||Hash functions are forming a special family of cryptographic algorithms, which are applied wherever message integrity and authentication issues are critical. As time passes it seems that all applications call for higher throughput due to their rapid acceptance by the market. In this work a new technique is presented for increasing frequency and throughput of the currently most used hash function, which is SHA-1. This technique involves the application of spatial and temporal pre-computation. Comparing to conventional pipelined implementations of hash functions the proposed technique leads to an implementation with more than 75% higher throughput||URI:||http://ktisis.cut.ac.cy/handle/10488/7375||ISBN:||978-142440395-0||DOI:||10.1109/ICECS.2006.379651||Rights:||© 2006 IEEE||Type:||Book Chapter|
|Appears in Collections:||Κεφάλαια βιβλίων/Book chapters|
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