Vassos Soteriou is an Associate Professor in the Department of Electrical and Computer Engineering and Informatics at the Cyprus University of Technology. He received the B.S. and Ph.D. degrees in electrical engineering from Rice University, Houston, Texas, in 2001, and Princeton University, Princeton, New Jersey, in 2006, respectively. His undergraduate studies were funded through a CASP/Fulbright scholarship. Dr. Soteriou is a recipient of a Best Paper Award at the 2004 IEEE International Conference on Computer Design, and a HiPEAC Paper Award for the paper titled "Use It Or Lose It: Wear-out and Lifetime in Future Chip Multiprocessors", published in the Proceedings of the 46th IEEE/ACM International Symposium on Microarchitecture (Micro). Dr. Soteriou is a Member of the IEEE and a Member of HiPEAC, the European Network of Excellence on High Performance and Embedded Architecture and Compilation. During 2002-2006 he was a member of the Gigascale Systems Research Center, where he collaborated with leading researchers in the fields of low-power inter- and intra-chip interconnection networks. He received a Teaching Assistant Award in 2003 at Princeton for helping teach “Advanced Computer Architecture.” During the spring of 2007 he worked as a Visiting Lecturer at the ECE Department of the University of Cyprus, where he taught courses in computer organization and microprocessors. Dr. Soteriou has worked at the following high-tech companies and research organizations: Micron Technology Inc. in the USA (semiconductor computer memories), Texas Instruments Inc. in the USA (TMSC6X Digital Signal Processors; DSPs), IBM Research GmbH Zurich in Switzerland (computer systems), and Stichting IMEC Nederland (IMEC-NL) Nanoelectronics Research Center (Infrastructure for Internet of Things). Dr. Soteriou has served on the Technical Committee of several conferences and serves as a regular reviewer for numerous journal and conference proceedings manuscripts of the IEEE and ACM. His research interests lie in computer architecture, interconnection networks, high-performance computing, on-chip networks and multi-core architectures, with emphasis on power consumption management methodologies, fault-tolerance, resilience, micro-architectural performance enhancements, and design-space exploration.