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| Issue Date | Title | Author(s) |
| Dec-2004 | Efficient implementation of the Keyed-Hash Message Authentication Code (HMAC) using the SHA-1 hash function | Michail, Harris ; Kakarountas, Athanasios P. ; Milidonis, Athanasios S. |
| Nov-2005 | Efficient small-sized implementation of the keyed-hash message authentication cod | Michail, Harris ; Yiakoumis, Ioannis I. ; Papadonikolakis, Markos E. |
| 1-Dec-2005 | Efficient small-sized implementation of the keyed-hash message authentication code | Yiakoumis, Ioannis ; Michail, Harris ; Papadonikolakis, Markos ; Goutis, Costas E.; Kakarountas, Athanasios P. |
| Oct-2012 | Evolution of the e-Museum concept through exploitation of cryptographic algorithms | Ioannides, Marinos ; Michail, Harris ; Athanasiou, George S. ; Gregoriades, Andreas |
| 30-Oct-2015 | Hardware implementation of the Totally Self-Checking SHA-256 hash core | Michail, Harris ; Kotsiolis, Apostolis ; Kakarountas, Athanasios P. ; Athanasiou, George S. ; Goutis, Costas E. |
| 6-Aug-2015 | High performance pipelined FPGA implementation of the SHA-3 hash algorithm | Ioannou, Lenos ; Michail, Harris ; Voyiatzis, Artemios G. |
| Jun-2010 | High Throughput Hardware/Software Co-Design Approach for SHA-256 Hashing Cryptographic Module In IPSec/IPv6 | Michail, Harris ; Athanasiou, George S. ; Gregoriades, Andreas ; Panagiotou, C. L. |
| Nov-2005 | High throughput implementation of the new Secure Hash Algorithm through partial unrolling | Michail, Harris ; Goutis, Costas E.; Aisopos, Konstantinos; Kakarountas, Athanasios P. |
| Jan-2013 | High-performance FPGA implementations of the cryptographic hash function JH | Athanasiou, George S. ; Michail, Harris ; Theodoridis, G. ; Goutis, Costas E. |
| Aug-2006 | High-speed FPGA implementation of secure hash algorithm for IPSec and VPN applications | Kakarountas, Athanasios P.; Theodoridis, George; Milidonis, Athanasios ; Goutis, Costas E.; Michail, Harris |
| Jul-2012 | High-throughput hardware architectures of the JH round-three SHA-3 candidate: An FPGA design and implementation approach | Athanasiou, George S.; Theodoridis, George; Chalkou, Chara I. ; Goutis, Costas E.; Michail, Harris ; Bardis, D. |
| 1-Dec-2009 | High-throughput implementation of the RIPEMD-160 | Kakarountas, Athanasios P. ; Michail, Harris ; Goutis, Costas E. ; Rjoub, Abdoul M. |
| 1-Dec-2008 | Holistic methodology for designing ultra high-speed SHA-1 hashing cryptographic module in hardware | Michail, Harris ; Goutis, C. |
| Jun-2010 | HW/SW co-design integrating high - Speed authentication module for IPSec/IPv6 | Michail, Harris ; Kelefouras, Vassilis ; Gregoriades, Andreas |
| 1-Dec-2007 | Implementation of HSSec: A high-speed cryptographic co-processor | Kakarountas, A. P. ; Goutis, C. E. ; Michail, Harris ; Efstathiou, C. |
| Feb-2009 | Improved throughput bit-serial multiplier for GF(2m) fields | Michail, Harris ; Selimis, George N. ; Fournaris, Apostolos P. |
| Sep-2007 | Integration of a concurrent signature monitoring mechanism in a system-on-a-chip | Kakarountas, Athanasios P.; Goutis, Costas E.; Michail, Harris |
| 2012 | An intelligent transportation system for accident risk index quantification | Michail, Harris ; Mouskos, Kyriacos C. ; Gregoriades, Andreas |
| Jul-2005 | A Low-Power and High-Throughput implementation of the SHA-1 hash function | Michail, Harris ; Goutis, Costas E.; Koufopavlou, Odysseas ; Kakarountas, Athanasios P. |
| Jan-2009 | Low-power architecture with scratch-pad memory for accelerating embedded applications with run-time reuse | Michail, Harris ; Milidonis, Athanasios S. ; Porpodas, Vasileios |
